Design of CMOS Digital-Processor Using Clock Gating

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K Prasad Babu
Dr. K.E. Sreenivasa Murthy
Dr. M.N. Giri Prasad

Abstract

Digital-processors are widely used in a wide range of practical applications. Battery-operated
devices with low strength dissipation are the primary driver in today's electronics industry,
leading to the development of several solutions for power reduction. Green-normal
performance and a large number of points of interest are both linked to the low-power
approach limitation. The advancement of CMOS generation enables us to produce large and
eminently performing integrated circuits. Using the winning gadgets has resulted in an
insatiable need for even more efficient-looking gadgets. The idea stems from the layout of
CPUs, which has evolved through time due to technological advancements. This document
explains how to build a CMOS processor from simple building components. Applying clockgating
to the layout Fewer voltage inputs are required to run the layout. Each node
technology is evaluated, and the amount of power required to run it is determined. The least
amount of energy being dissipated is one of the possible outcomes.

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